Synthesis Messages

Report Title GowinSynthesis Report
Design File J:\Proekts_GoWin\Tang_Nano_9\Proba_IP\fpga_project\src\FPGA_modul.v
J:\Proekts_GoWin\Tang_Nano_9\Proba_IP\fpga_project\src\gowin_empu_m1\gowin_empu_m1.v
J:\Proekts_GoWin\Tang_Nano_9\Proba_IP\fpga_project\src\gowin_rpll\gowin_rpll.v
GowinSynthesis Constraints File ---
Version GowinSynthesis V1.9.8.08
Part Number GW1NR-LV9QN88PC6/I5
Device GW1NR-9C
Created Time Thu Jun 15 13:23:58 2023
Legal Announcement Copyright (C)2014-2022 Gowin Semiconductor Corporation. ALL rights reserved.

Synthesis Details

Top Level Module SOFT_Core_MPU
Synthesis Process Running parser:
    CPU time = 0h 0m 2s, Elapsed time = 0h 0m 3s, Peak memory usage = 257.852MB
Running netlist conversion:
    CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s, Peak memory usage = 0MB
Running device independent optimization:
    Optimizing Phase 0: CPU time = 0h 0m 0.28s, Elapsed time = 0h 0m 0.285s, Peak memory usage = 257.852MB
    Optimizing Phase 1: CPU time = 0h 0m 0.296s, Elapsed time = 0h 0m 0.292s, Peak memory usage = 257.852MB
    Optimizing Phase 2: CPU time = 0h 0m 0.483s, Elapsed time = 0h 0m 0.475s, Peak memory usage = 257.852MB
Running inference:
    Inferring Phase 0: CPU time = 0h 0m 0.14s, Elapsed time = 0h 0m 0.144s, Peak memory usage = 257.852MB
    Inferring Phase 1: CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.014s, Peak memory usage = 257.852MB
    Inferring Phase 2: CPU time = 0h 0m 0.062s, Elapsed time = 0h 0m 0.07s, Peak memory usage = 257.852MB
    Inferring Phase 3: CPU time = 0h 0m 0.031s, Elapsed time = 0h 0m 0.017s, Peak memory usage = 257.852MB
Running technical mapping:
    Tech-Mapping Phase 0: CPU time = 0h 0m 0.296s, Elapsed time = 0h 0m 0.305s, Peak memory usage = 257.852MB
    Tech-Mapping Phase 1: CPU time = 0h 0m 0.327s, Elapsed time = 0h 0m 0.3s, Peak memory usage = 257.852MB
    Tech-Mapping Phase 2: CPU time = 0h 0m 0.109s, Elapsed time = 0h 0m 0.109s, Peak memory usage = 257.852MB
    Tech-Mapping Phase 3: CPU time = 0h 0m 6s, Elapsed time = 0h 0m 6s, Peak memory usage = 257.852MB
    Tech-Mapping Phase 4: CPU time = 0h 0m 0.312s, Elapsed time = 0h 0m 0.32s, Peak memory usage = 257.852MB
Generate output files:
    CPU time = 0h 0m 0.936s, Elapsed time = 0h 0m 0.984s, Peak memory usage = 257.852MB
Total Time and Memory Usage CPU time = 0h 0m 11s, Elapsed time = 0h 0m 12s, Peak memory usage = 257.852MB

Resource

Resource Usage Summary

Resource Usage
I/O Port 32
I/O Buf 33
    IBUF 9
    OBUF 15
    IOBUF 9
Register 2679
    DFF 103
    DFFE 45
    DFFS 1
    DFFSE 1
    DFFR 51
    DFFRE 1
    DFFP 30
    DFFPE 87
    DFFC 464
    DFFCE 1895
    DFFNC 1
LUT 6023
    LUT2 482
    LUT3 1681
    LUT4 3860
ALU 182
    ALU 182
SSRAM 20
    RAM16S4 4
    RAM16SDP4 16
INV 24
    INV 24
DSP 1
    MULT36X36 1
BSRAM 24
    DPB 24
CLOCK 1
    rPLL 1

Resource Utilization Summary

Resource Usage Utilization
Logic 6349(6047 LUTs, 182 ALUs, 20 SSRAMs) / 8640 73%
Register 2679 / 6693 40%
  --Register as Latch 0 / 6693 0%
  --Register as FF 2679 / 6693 40%
BSRAM 24 / 26 92%

Timing

Clock Summary:

Clock Name Type Period Frequency(MHz) Rise Fall Source Master Object
sys_clk Base 37.037 27.0 0.000 18.519 sys_clk_ibuf/I
Gowin_EMPU_M1_Top_1/HCLK_ibuf/I Base 20.000 50.0 0.000 10.000 Gowin_EMPU_M1_Top_1/HCLK_ibuf/I
TCLK_JTAG_Soft Base 20.000 50.0 0.000 10.000 Gowin_EMPU_M1_Top_1/JTAG_9_ibuf/I
clk_1kHz_4 Base 20.000 50.0 0.000 10.000 clk_1kHz_s1/Q
clk_2kHz_4 Base 20.000 50.0 0.000 10.000 clk_2kHz_s1/Q
Gowin_rPLL_1/rpll_inst/CLKOUT.default_gen_clk Generated 18.519 54.0 0.000 9.259 sys_clk_ibuf/I sys_clk Gowin_rPLL_1/rpll_inst/CLKOUT
Gowin_rPLL_1/rpll_inst/CLKOUTP.default_gen_clk Generated 18.519 54.0 0.000 9.259 sys_clk_ibuf/I sys_clk Gowin_rPLL_1/rpll_inst/CLKOUTP
Gowin_rPLL_1/rpll_inst/CLKOUTD.default_gen_clk Generated 37.037 27.0 0.000 18.519 sys_clk_ibuf/I sys_clk Gowin_rPLL_1/rpll_inst/CLKOUTD
Gowin_rPLL_1/rpll_inst/CLKOUTD3.default_gen_clk Generated 55.556 18.0 0.000 27.778 sys_clk_ibuf/I sys_clk Gowin_rPLL_1/rpll_inst/CLKOUTD3

Max Frequency Summary:

No. Clock Name Constraint Actual Fmax Logic Level Entity
1 sys_clk 27.0(MHz) 240.0(MHz) 4 TOP
2 Gowin_EMPU_M1_Top_1/HCLK_ibuf/I 50.0(MHz) 53.3(MHz) 14 TOP
3 TCLK_JTAG_Soft 50.0(MHz) 67.0(MHz) 5 TOP
4 clk_2kHz_4 50.0(MHz) 81.1(MHz) 8 TOP

Detail Timing Paths Information

Path 1

Path Summary:
Slack -2.096
Data Arrival Time 23.011
Data Required Time 20.915
From Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/State_cdc_check_1_s0
To Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/PackCtr_1_s1
Launch Clk TCLK_JTAG_Soft[R]
Latch Clk Gowin_EMPU_M1_Top_1/HCLK_ibuf/I[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 TCLK_JTAG_Soft
0.000 0.000 tCL RR 1 Gowin_EMPU_M1_Top_1/JTAG_9_ibuf/I
0.982 0.982 tINS RR 324 Gowin_EMPU_M1_Top_1/JTAG_9_ibuf/O
1.345 0.363 tNET RR 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/State_cdc_check_1_s0/CLK
1.803 0.458 tC2Q RF 15 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/State_cdc_check_1_s0/Q
2.283 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/iDBGDI_s1/I1
3.382 1.099 tINS FF 5 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/iDBGDI_s1/F
3.862 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/iDBGDI_s0/I0
4.894 1.032 tINS FF 100 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/iDBGDI_s0/F
5.374 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/BdSel_s1/I2
6.196 0.822 tINS FF 3 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/BdSel_s1/F
6.676 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/AhbCtlEn_s2/I1
7.775 1.099 tINS FF 4 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/AhbCtlEn_s2/F
8.255 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s24/I1
9.354 1.099 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s24/F
9.834 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s22/I1
10.933 1.099 tINS FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s22/F
11.413 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s29/I0
12.445 1.032 tINS FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s29/F
12.925 0.480 tNET FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n364_s0/I1
13.970 1.045 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n364_s0/COUT
13.970 0.000 tNET FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n365_s0/CIN
14.027 0.057 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n365_s0/COUT
14.027 0.000 tNET FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n366_s0/CIN
14.084 0.057 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n366_s0/COUT
14.564 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n527_s2/I2
15.386 0.822 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n527_s2/F
15.866 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n527_s1/I1
16.965 1.099 tINS FF 8 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n527_s1/F
17.445 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/TaWrEn_s3/I1
18.544 1.099 tINS FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/TaWrEn_s3/F
19.024 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextPackCtr_0_s7/I2
19.846 0.822 tINS FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextPackCtr_0_s7/F
20.326 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextPackCtr_1_s8/I1
21.425 1.099 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextPackCtr_1_s8/F
21.905 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextPackCtr_1_s6/I3
22.531 0.626 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextPackCtr_1_s6/F
23.011 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/PackCtr_1_s1/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
20.000 0.000 Gowin_EMPU_M1_Top_1/HCLK_ibuf/I
20.000 0.000 tCL RR 1 Gowin_EMPU_M1_Top_1/HCLK_ibuf/I
20.982 0.982 tINS RR 2358 Gowin_EMPU_M1_Top_1/HCLK_ibuf/O
21.345 0.363 tNET RR 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/PackCtr_1_s1/CLK
21.315 -0.030 tUnc Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/PackCtr_1_s1
20.915 -0.400 tSu 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/PackCtr_1_s1
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 20.000
Logic Level: 16
Arrival Clock Path Delay: cell: 0.982, 73.009%; route: 0.363, 26.991%
Arrival Data Path Delay: cell: 14.008, 64.654%; route: 7.200, 33.231%; tC2Q: 0.458, 2.115%
Required Clock Path Delay: cell: 0.982, 73.009%; route: 0.363, 26.991%

Path 2

Path Summary:
Slack -0.923
Data Arrival Time 21.838
Data Required Time 20.915
From Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/State_cdc_check_1_s0
To Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/DAPRDATA_12_s0
Launch Clk TCLK_JTAG_Soft[R]
Latch Clk Gowin_EMPU_M1_Top_1/HCLK_ibuf/I[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 TCLK_JTAG_Soft
0.000 0.000 tCL RR 1 Gowin_EMPU_M1_Top_1/JTAG_9_ibuf/I
0.982 0.982 tINS RR 324 Gowin_EMPU_M1_Top_1/JTAG_9_ibuf/O
1.345 0.363 tNET RR 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/State_cdc_check_1_s0/CLK
1.803 0.458 tC2Q RF 15 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/State_cdc_check_1_s0/Q
2.283 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/iDBGDI_s1/I1
3.382 1.099 tINS FF 5 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/iDBGDI_s1/F
3.862 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/iDBGDI_s0/I0
4.894 1.032 tINS FF 100 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/iDBGDI_s0/F
5.374 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/BdSel_s1/I2
6.196 0.822 tINS FF 3 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/BdSel_s1/F
6.676 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/AhbCtlEn_s2/I1
7.775 1.099 tINS FF 4 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/AhbCtlEn_s2/F
8.255 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s24/I1
9.354 1.099 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s24/F
9.834 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s22/I1
10.933 1.099 tINS FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s22/F
11.413 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s29/I0
12.445 1.032 tINS FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s29/F
12.925 0.480 tNET FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n364_s0/I1
13.970 1.045 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n364_s0/COUT
13.970 0.000 tNET FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n365_s0/CIN
14.027 0.057 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n365_s0/COUT
14.027 0.000 tNET FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n366_s0/CIN
14.084 0.057 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n366_s0/COUT
14.564 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n527_s2/I2
15.386 0.822 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n527_s2/F
15.866 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n527_s1/I1
16.965 1.099 tINS FF 8 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n527_s1/F
17.445 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_1_s4/I0
18.477 1.032 tINS FF 32 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_1_s4/F
18.957 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_12_s1/I1
20.056 1.099 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_12_s1/F
20.536 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_12_s0/I2
21.358 0.822 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_12_s0/F
21.838 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/DAPRDATA_12_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
20.000 0.000 Gowin_EMPU_M1_Top_1/HCLK_ibuf/I
20.000 0.000 tCL RR 1 Gowin_EMPU_M1_Top_1/HCLK_ibuf/I
20.982 0.982 tINS RR 2358 Gowin_EMPU_M1_Top_1/HCLK_ibuf/O
21.345 0.363 tNET RR 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/DAPRDATA_12_s0/CLK
21.315 -0.030 tUnc Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/DAPRDATA_12_s0
20.915 -0.400 tSu 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/DAPRDATA_12_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 20.000
Logic Level: 15
Arrival Clock Path Delay: cell: 0.982, 73.009%; route: 0.363, 26.991%
Arrival Data Path Delay: cell: 13.315, 64.973%; route: 6.720, 32.791%; tC2Q: 0.458, 2.236%
Required Clock Path Delay: cell: 0.982, 73.009%; route: 0.363, 26.991%

Path 3

Path Summary:
Slack -0.923
Data Arrival Time 21.838
Data Required Time 20.915
From Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/State_cdc_check_1_s0
To Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/DAPRDATA_13_s0
Launch Clk TCLK_JTAG_Soft[R]
Latch Clk Gowin_EMPU_M1_Top_1/HCLK_ibuf/I[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 TCLK_JTAG_Soft
0.000 0.000 tCL RR 1 Gowin_EMPU_M1_Top_1/JTAG_9_ibuf/I
0.982 0.982 tINS RR 324 Gowin_EMPU_M1_Top_1/JTAG_9_ibuf/O
1.345 0.363 tNET RR 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/State_cdc_check_1_s0/CLK
1.803 0.458 tC2Q RF 15 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/State_cdc_check_1_s0/Q
2.283 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/iDBGDI_s1/I1
3.382 1.099 tINS FF 5 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/iDBGDI_s1/F
3.862 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/iDBGDI_s0/I0
4.894 1.032 tINS FF 100 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/iDBGDI_s0/F
5.374 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/BdSel_s1/I2
6.196 0.822 tINS FF 3 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/BdSel_s1/F
6.676 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/AhbCtlEn_s2/I1
7.775 1.099 tINS FF 4 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/AhbCtlEn_s2/F
8.255 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s24/I1
9.354 1.099 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s24/F
9.834 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s22/I1
10.933 1.099 tINS FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s22/F
11.413 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s29/I0
12.445 1.032 tINS FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s29/F
12.925 0.480 tNET FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n364_s0/I1
13.970 1.045 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n364_s0/COUT
13.970 0.000 tNET FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n365_s0/CIN
14.027 0.057 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n365_s0/COUT
14.027 0.000 tNET FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n366_s0/CIN
14.084 0.057 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n366_s0/COUT
14.564 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n527_s2/I2
15.386 0.822 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n527_s2/F
15.866 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n527_s1/I1
16.965 1.099 tINS FF 8 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n527_s1/F
17.445 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_1_s4/I0
18.477 1.032 tINS FF 32 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_1_s4/F
18.957 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_13_s1/I1
20.056 1.099 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_13_s1/F
20.536 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_13_s0/I2
21.358 0.822 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_13_s0/F
21.838 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/DAPRDATA_13_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
20.000 0.000 Gowin_EMPU_M1_Top_1/HCLK_ibuf/I
20.000 0.000 tCL RR 1 Gowin_EMPU_M1_Top_1/HCLK_ibuf/I
20.982 0.982 tINS RR 2358 Gowin_EMPU_M1_Top_1/HCLK_ibuf/O
21.345 0.363 tNET RR 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/DAPRDATA_13_s0/CLK
21.315 -0.030 tUnc Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/DAPRDATA_13_s0
20.915 -0.400 tSu 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/DAPRDATA_13_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 20.000
Logic Level: 15
Arrival Clock Path Delay: cell: 0.982, 73.009%; route: 0.363, 26.991%
Arrival Data Path Delay: cell: 13.315, 64.973%; route: 6.720, 32.791%; tC2Q: 0.458, 2.236%
Required Clock Path Delay: cell: 0.982, 73.009%; route: 0.363, 26.991%

Path 4

Path Summary:
Slack -0.923
Data Arrival Time 21.838
Data Required Time 20.915
From Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/State_cdc_check_1_s0
To Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/DAPRDATA_14_s0
Launch Clk TCLK_JTAG_Soft[R]
Latch Clk Gowin_EMPU_M1_Top_1/HCLK_ibuf/I[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 TCLK_JTAG_Soft
0.000 0.000 tCL RR 1 Gowin_EMPU_M1_Top_1/JTAG_9_ibuf/I
0.982 0.982 tINS RR 324 Gowin_EMPU_M1_Top_1/JTAG_9_ibuf/O
1.345 0.363 tNET RR 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/State_cdc_check_1_s0/CLK
1.803 0.458 tC2Q RF 15 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/State_cdc_check_1_s0/Q
2.283 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/iDBGDI_s1/I1
3.382 1.099 tINS FF 5 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/iDBGDI_s1/F
3.862 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/iDBGDI_s0/I0
4.894 1.032 tINS FF 100 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/iDBGDI_s0/F
5.374 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/BdSel_s1/I2
6.196 0.822 tINS FF 3 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/BdSel_s1/F
6.676 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/AhbCtlEn_s2/I1
7.775 1.099 tINS FF 4 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/AhbCtlEn_s2/F
8.255 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s24/I1
9.354 1.099 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s24/F
9.834 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s22/I1
10.933 1.099 tINS FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s22/F
11.413 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s29/I0
12.445 1.032 tINS FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s29/F
12.925 0.480 tNET FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n364_s0/I1
13.970 1.045 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n364_s0/COUT
13.970 0.000 tNET FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n365_s0/CIN
14.027 0.057 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n365_s0/COUT
14.027 0.000 tNET FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n366_s0/CIN
14.084 0.057 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n366_s0/COUT
14.564 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n527_s2/I2
15.386 0.822 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n527_s2/F
15.866 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n527_s1/I1
16.965 1.099 tINS FF 8 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n527_s1/F
17.445 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_1_s4/I0
18.477 1.032 tINS FF 32 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_1_s4/F
18.957 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_14_s1/I1
20.056 1.099 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_14_s1/F
20.536 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_14_s0/I2
21.358 0.822 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_14_s0/F
21.838 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/DAPRDATA_14_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
20.000 0.000 Gowin_EMPU_M1_Top_1/HCLK_ibuf/I
20.000 0.000 tCL RR 1 Gowin_EMPU_M1_Top_1/HCLK_ibuf/I
20.982 0.982 tINS RR 2358 Gowin_EMPU_M1_Top_1/HCLK_ibuf/O
21.345 0.363 tNET RR 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/DAPRDATA_14_s0/CLK
21.315 -0.030 tUnc Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/DAPRDATA_14_s0
20.915 -0.400 tSu 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/DAPRDATA_14_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 20.000
Logic Level: 15
Arrival Clock Path Delay: cell: 0.982, 73.009%; route: 0.363, 26.991%
Arrival Data Path Delay: cell: 13.315, 64.973%; route: 6.720, 32.791%; tC2Q: 0.458, 2.236%
Required Clock Path Delay: cell: 0.982, 73.009%; route: 0.363, 26.991%

Path 5

Path Summary:
Slack -0.923
Data Arrival Time 21.838
Data Required Time 20.915
From Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/State_cdc_check_1_s0
To Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/DAPRDATA_15_s0
Launch Clk TCLK_JTAG_Soft[R]
Latch Clk Gowin_EMPU_M1_Top_1/HCLK_ibuf/I[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 TCLK_JTAG_Soft
0.000 0.000 tCL RR 1 Gowin_EMPU_M1_Top_1/JTAG_9_ibuf/I
0.982 0.982 tINS RR 324 Gowin_EMPU_M1_Top_1/JTAG_9_ibuf/O
1.345 0.363 tNET RR 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/State_cdc_check_1_s0/CLK
1.803 0.458 tC2Q RF 15 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/State_cdc_check_1_s0/Q
2.283 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/iDBGDI_s1/I1
3.382 1.099 tINS FF 5 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/iDBGDI_s1/F
3.862 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/iDBGDI_s0/I0
4.894 1.032 tINS FF 100 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_swj_dp/uDAPSwjWatcher/iDBGDI_s0/F
5.374 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/BdSel_s1/I2
6.196 0.822 tINS FF 3 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/BdSel_s1/F
6.676 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/AhbCtlEn_s2/I1
7.775 1.099 tINS FF 4 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/AhbCtlEn_s2/F
8.255 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s24/I1
9.354 1.099 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s24/F
9.834 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s22/I1
10.933 1.099 tINS FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s22/F
11.413 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s29/I0
12.445 1.032 tINS FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextState_1_s29/F
12.925 0.480 tNET FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n364_s0/I1
13.970 1.045 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n364_s0/COUT
13.970 0.000 tNET FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n365_s0/CIN
14.027 0.057 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n365_s0/COUT
14.027 0.000 tNET FF 2 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n366_s0/CIN
14.084 0.057 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n366_s0/COUT
14.564 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n527_s2/I2
15.386 0.822 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n527_s2/F
15.866 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n527_s1/I1
16.965 1.099 tINS FF 8 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/n527_s1/F
17.445 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_1_s4/I0
18.477 1.032 tINS FF 32 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_1_s4/F
18.957 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_15_s1/I1
20.056 1.099 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_15_s1/F
20.536 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_15_s0/I2
21.358 0.822 tINS FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/NextDapRdData_15_s0/F
21.838 0.480 tNET FF 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/DAPRDATA_15_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
20.000 0.000 Gowin_EMPU_M1_Top_1/HCLK_ibuf/I
20.000 0.000 tCL RR 1 Gowin_EMPU_M1_Top_1/HCLK_ibuf/I
20.982 0.982 tINS RR 2358 Gowin_EMPU_M1_Top_1/HCLK_ibuf/O
21.345 0.363 tNET RR 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/DAPRDATA_15_s0/CLK
21.315 -0.030 tUnc Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/DAPRDATA_15_s0
20.915 -0.400 tSu 1 Gowin_EMPU_M1_Top_1/M1_inst/u_CortexM1DbgIntegration_inst/u_cortexm1/u_dap_ahb_ap/uDAPAhbApSlv/DAPRDATA_15_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 20.000
Logic Level: 15
Arrival Clock Path Delay: cell: 0.982, 73.009%; route: 0.363, 26.991%
Arrival Data Path Delay: cell: 13.315, 64.973%; route: 6.720, 32.791%; tC2Q: 0.458, 2.236%
Required Clock Path Delay: cell: 0.982, 73.009%; route: 0.363, 26.991%